Register transfer system design using FPGA implementation

Simple item page
dc.contributor.advisorP., Diduch
dc.contributor.authorSansom, Janice
dc.date.accessioned2023-06-07T20:29:32Z
dc.date.available2023-06-07T20:29:32Z
dc.date.issued1997
dc.description.copyrightNot available for use outside of the University of New Brunswick
dc.description.noteSansom, Janice (1997). Register transfer system design using FPGA implementation . (Engineering Senior Report no. EE-512 1997). Fredericton : University of New Brunswick, Dept. of Electrical and Computer Engineering EE-512 1997 1882/16056
dc.identifier.urihttps://unbscholar.lib.unb.ca/handle/1882/34057
dc.language.isoen_CA
dc.publisherUniversity of New Brunswick
dc.rightshttp://purl.org/coar/access_right/c_16ec
dc.subject.disciplineEngineering
dc.titleRegister transfer system design using FPGA implementation
dc.typesenior report
thesis.degree.disciplineEngineering
thesis.degree.fullnameBachelor of Science in Engineering
thesis.degree.grantorUniversity of New Brunswick
thesis.degree.levelundergraduate
thesis.degree.nameBachelor of Science in Engineering

Files

Collections

Senior Reports