Frequency measurement by phase locked loop for sinusoidal voltages
dc.contributor.advisor | Kaye, Mary | |
dc.contributor.advisor | Diduch, Chris | |
dc.contributor.advisor | Chang, Liuchen | |
dc.contributor.author | Luo, Zijun | |
dc.date.accessioned | 2023-03-01T16:21:33Z | |
dc.date.available | 2023-03-01T16:21:33Z | |
dc.date.issued | 2012 | |
dc.date.updated | 2020-06-10T00:00:00Z | |
dc.description.abstract | In distributed generation systems, fast and accurate detection of frequency and phase information plays a critical role for frequency protection and power quality control purposes for grid-connected power converters. This thesis focuses on the development of an improved PLL algorithm for frequency measurement under voltage sag operations in distributed generation systems. Based on the study of the second order generalized integrator (SOGI), a novel frequency locked loop (SOGI-nFLL) is proposed for the improvement of the frequency measurement under voltage sags. The characteristics and the stability of the nFLL are analyzed. The proposed method provides higher accuracy for frequency measurement and less overshoot in the transient. The comparison with the existing SOGI method has done in SIMULINK and on a Digilent Spartan 3E FPGA development board. The hardware implementation and consideration are also included. The implementation of a FPGA greatly expands the programmability and flexibility of the system. It enables the realization of more advanced algorithms with a very low cost. A customized printed circuit board (PCB) has been built for such intention. | |
dc.description.copyright | ©Zijun Luo, 2012 | |
dc.description.note | Scanned from archival print submission. | |
dc.format | text/xml | |
dc.format.extent | xii, 87 pages | |
dc.format.medium | electronic | |
dc.identifier.other | Thesis 8972 | |
dc.identifier.uri | https://unbscholar.lib.unb.ca/handle/1882/13630 | |
dc.language.iso | en_CA | |
dc.publisher | University of New Brunswick | |
dc.rights | http://purl.org/coar/access_right/c_abf2 | |
dc.subject.discipline | Electrical and Computer Engineering | |
dc.title | Frequency measurement by phase locked loop for sinusoidal voltages | |
dc.type | master thesis | |
thesis.degree.discipline | Electrical and Computer Engineering | |
thesis.degree.fullname | Master of Science in Engineering | |
thesis.degree.grantor | University of New Brunswick | |
thesis.degree.level | masters | |
thesis.degree.name | M.Sc.E. |
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